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Updated spirv-headers.

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Бранимир Караџић
2025-10-21 19:23:02 -07:00
parent e9bdf630f7
commit 108cf85f46
5 changed files with 34 additions and 1 deletions
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3
3rdparty/spirv-headers/include/spirv/spir-v.xml vendored
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@@ -81,7 +81,8 @@
<id value="46" vendor="Nintendo" comment="Contact Steve Urquhart, steve.urquhart@ntd.nintendo.com"/>
<id value="47" vendor="ARM" comment="Contact Christopher Gautier, christopher.gautier@arm.com"/>
<id value="48" vendor="Goopax" comment="Contact Ingo Josopait, josopait@goopax.com"/>
<unused start="49" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
<id value="49" vendor="Icyllis Milica" tool="Arc3D Shader Compiler" comment="Contact Icyllis Milica, https://github.com/BloCamLimb/Arc3D"/>
<unused start="50" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
</ids>
<!-- SECTION: SPIR-V Opcodes and Enumerants -->

20
3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json vendored
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@@ -4707,6 +4707,20 @@
{ "kind" : "IdRef", "quantifier" : "?", "name" : "Cache Type" }
]
},
{
"opname" : "OpFmaKHR",
"class" : "Arithmetic",
"opcode" : 4427,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdRef", "name" : "Operand 1" },
{ "kind" : "IdRef", "name" : "Operand 2" },
{ "kind" : "IdRef", "name" : "Operand 3" }
],
"capabilities" : [ "FMAKHR" ],
"version" : "None"
},
{
"opname" : "OpSubgroupAllKHR",
"class" : "Group",
@@ -17607,6 +17621,12 @@
"extensions" : [ "SPV_KHR_float_controls2" ],
"version" : "None"
},
{
"enumerant" : "FMAKHR",
"value" : 6030,
"extensions" : [ "SPV_KHR_fma" ],
"version" : "None"
},
{
"enumerant" : "AtomicFloat32AddEXT",
"value" : 6033,

5
3rdparty/spirv-headers/include/spirv/unified1/spirv.h vendored
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@@ -1260,6 +1260,7 @@ typedef enum SpvCapability_ {
SpvCapabilityBitInstructions = 6025,
SpvCapabilityGroupNonUniformRotateKHR = 6026,
SpvCapabilityFloatControls2 = 6029,
SpvCapabilityFMAKHR = 6030,
SpvCapabilityAtomicFloat32AddEXT = 6033,
SpvCapabilityAtomicFloat64AddEXT = 6034,
SpvCapabilityLongCompositesINTEL = 6089,
@@ -1975,6 +1976,7 @@ typedef enum SpvOp_ {
SpvOpUntypedInBoundsPtrAccessChainKHR = 4424,
SpvOpUntypedArrayLengthKHR = 4425,
SpvOpUntypedPrefetchKHR = 4426,
SpvOpFmaKHR = 4427,
SpvOpSubgroupAllKHR = 4428,
SpvOpSubgroupAnyKHR = 4429,
SpvOpSubgroupAllEqualKHR = 4430,
@@ -2819,6 +2821,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpUntypedInBoundsPtrAccessChainKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpUntypedArrayLengthKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpUntypedPrefetchKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpFmaKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
@@ -4215,6 +4218,7 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilityBitInstructions: return "BitInstructions";
case SpvCapabilityGroupNonUniformRotateKHR: return "GroupNonUniformRotateKHR";
case SpvCapabilityFloatControls2: return "FloatControls2";
case SpvCapabilityFMAKHR: return "FMAKHR";
case SpvCapabilityAtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
case SpvCapabilityAtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
case SpvCapabilityLongCompositesINTEL: return "LongCompositesINTEL";
@@ -4810,6 +4814,7 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpUntypedInBoundsPtrAccessChainKHR: return "OpUntypedInBoundsPtrAccessChainKHR";
case SpvOpUntypedArrayLengthKHR: return "OpUntypedArrayLengthKHR";
case SpvOpUntypedPrefetchKHR: return "OpUntypedPrefetchKHR";
case SpvOpFmaKHR: return "OpFmaKHR";
case SpvOpSubgroupAllKHR: return "OpSubgroupAllKHR";
case SpvOpSubgroupAnyKHR: return "OpSubgroupAnyKHR";
case SpvOpSubgroupAllEqualKHR: return "OpSubgroupAllEqualKHR";

5
3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11 vendored
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@@ -1256,6 +1256,7 @@ enum class Capability : unsigned {
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
FloatControls2 = 6029,
FMAKHR = 6030,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
@@ -1971,6 +1972,7 @@ enum class Op : unsigned {
OpUntypedInBoundsPtrAccessChainKHR = 4424,
OpUntypedArrayLengthKHR = 4425,
OpUntypedPrefetchKHR = 4426,
OpFmaKHR = 4427,
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
@@ -2815,6 +2817,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpUntypedInBoundsPtrAccessChainKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpUntypedArrayLengthKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpUntypedPrefetchKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpFmaKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
@@ -4211,6 +4214,7 @@ inline const char* CapabilityToString(Capability value) {
case Capability::BitInstructions: return "BitInstructions";
case Capability::GroupNonUniformRotateKHR: return "GroupNonUniformRotateKHR";
case Capability::FloatControls2: return "FloatControls2";
case Capability::FMAKHR: return "FMAKHR";
case Capability::AtomicFloat32AddEXT: return "AtomicFloat32AddEXT";
case Capability::AtomicFloat64AddEXT: return "AtomicFloat64AddEXT";
case Capability::LongCompositesINTEL: return "LongCompositesINTEL";
@@ -4806,6 +4810,7 @@ inline const char* OpToString(Op value) {
case Op::OpUntypedInBoundsPtrAccessChainKHR: return "OpUntypedInBoundsPtrAccessChainKHR";
case Op::OpUntypedArrayLengthKHR: return "OpUntypedArrayLengthKHR";
case Op::OpUntypedPrefetchKHR: return "OpUntypedPrefetchKHR";
case Op::OpFmaKHR: return "OpFmaKHR";
case Op::OpSubgroupAllKHR: return "OpSubgroupAllKHR";
case Op::OpSubgroupAnyKHR: return "OpSubgroupAnyKHR";
case Op::OpSubgroupAllEqualKHR: return "OpSubgroupAllEqualKHR";

2
3rdparty/spirv-headers/include/spirv/unified1/spirv.json vendored
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@@ -1232,6 +1232,7 @@
"BitInstructions": 6025,
"GroupNonUniformRotateKHR": 6026,
"FloatControls2": 6029,
"FMAKHR": 6030,
"AtomicFloat32AddEXT": 6033,
"AtomicFloat64AddEXT": 6034,
"LongCompositesINTEL": 6089,
@@ -1952,6 +1953,7 @@
"OpUntypedInBoundsPtrAccessChainKHR": 4424,
"OpUntypedArrayLengthKHR": 4425,
"OpUntypedPrefetchKHR": 4426,
"OpFmaKHR": 4427,
"OpSubgroupAllKHR": 4428,
"OpSubgroupAnyKHR": 4429,
"OpSubgroupAllEqualKHR": 4430,