mirror of
https://github.com/bkaradzic/bx.git
synced 2026-02-17 20:52:37 +01:00
arm_neon is enabled on clang compiler
This commit is contained in:
committed by
Бранимир Караџић
parent
001f2cef42
commit
ead3450ec7
@@ -9,6 +9,23 @@
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namespace bx
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{
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#if BX_COMPILER_CLANG
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#define SHUFFLE_A(_a, _i0, _i1, _i2, _i3) \
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__builtin_shufflevector(_a, _a, _i0, _i1, _i2, _i3 )
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#define SHUFFLE_AB(_a, _b, _i0, _i1, _i2, _i3) \
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__builtin_shufflevector(_a, _b, _i0, _i1, _i2, _i3 )
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#else
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#define SHUFFLE_A(_a, _i0, _i1, _i2, _i3) \
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__builtin_shuffle(_a, (uint32x4_t){ _i0, _i1, _i2, _i3 })
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#define SHUFFLE_AB(_a, _b, _i0, _i1, _i2, _i3) \
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__builtin_shuffle(_a, _b, (uint32x4_t){ _i0, _i1, _i2, _i3 })
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#endif
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#define ELEMx 0
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#define ELEMy 1
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#define ELEMz 2
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@@ -17,7 +34,7 @@ namespace bx
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template<> \
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_swiz_##_x##_y##_z##_w(simd128_neon_t _a) \
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{ \
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return __builtin_shuffle(_a, (uint32x4_t){ ELEM##_x, ELEM##_y, ELEM##_z, ELEM##_w }); \
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return SHUFFLE_A(_a, ELEM##_x, ELEM##_y, ELEM##_z, ELEM##_w ); \
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}
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#include "simd128_swizzle.inl"
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@@ -74,50 +91,52 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_xyAB(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 0, 1, 4, 5 });
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return SHUFFLE_AB(_a, _b, 0, 1, 4, 5 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_ABxy(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 4, 5, 0, 1 });
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return SHUFFLE_AB(_a, _b, 4, 5, 0, 1 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_CDzw(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 6, 7, 2, 3 });
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return SHUFFLE_AB(_a, _b, 6, 7, 2, 3 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_zwCD(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 2, 3, 6, 7 });
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return SHUFFLE_AB(_a, _b, 2, 3, 6, 7 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_xAyB(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 0, 4, 1, 5 });
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return SHUFFLE_AB(_a, _b, 0, 4, 1, 5 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_AxBy(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 1, 5, 0, 4 });
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return SHUFFLE_AB(_a, _b, 4, 0, 5, 1 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_zCwD(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 2, 6, 3, 7 });
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return SHUFFLE_AB(_a, _b, 2, 6, 3, 7 );
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}
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_shuf_CzDw(simd128_neon_t _a, simd128_neon_t _b)
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{
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return __builtin_shuffle(_a, _b, (uint32x4_t){ 6, 2, 7, 3 });
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return SHUFFLE_AB(_a, _b, 6, 2, 7, 3 );
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}
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#undef SHUFFLE_A
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#undef SHUFFLE_AB
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template<>
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BX_SIMD_FORCE_INLINE float simd_x(simd128_neon_t _a)
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@@ -367,6 +386,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_sll(simd128_neon_t _a, int _count)
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{
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#if !BX_COMPILER_CLANG
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if (__builtin_constant_p(_count) )
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{
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const uint32x4_t tmp0 = vreinterpretq_u32_f32(_a);
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@@ -375,7 +395,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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return result;
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}
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#endif
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const uint32x4_t tmp0 = vreinterpretq_u32_f32(_a);
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const int32x4_t shift = vdupq_n_s32(_count);
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const uint32x4_t tmp1 = vshlq_u32(tmp0, shift);
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@@ -387,6 +407,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_srl(simd128_neon_t _a, int _count)
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{
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#if !BX_COMPILER_CLANG
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if (__builtin_constant_p(_count) )
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{
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const uint32x4_t tmp0 = vreinterpretq_u32_f32(_a);
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@@ -395,7 +416,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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return result;
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}
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#endif
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const uint32x4_t tmp0 = vreinterpretq_u32_f32(_a);
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const int32x4_t shift = vdupq_n_s32(-_count);
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const uint32x4_t tmp1 = vshlq_u32(tmp0, shift);
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@@ -407,6 +428,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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template<>
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BX_SIMD_FORCE_INLINE simd128_neon_t simd_sra(simd128_neon_t _a, int _count)
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{
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#if !BX_COMPILER_CLANG
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if (__builtin_constant_p(_count) )
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{
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const int32x4_t tmp0 = vreinterpretq_s32_f32(_a);
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@@ -415,7 +437,7 @@ BX_SIMD128_IMPLEMENT_TEST(yzw, yzww);
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return result;
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}
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#endif
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const int32x4_t tmp0 = vreinterpretq_s32_f32(_a);
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const int32x4_t shift = vdupq_n_s32(-_count);
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const int32x4_t tmp1 = vshlq_s32(tmp0, shift);
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@@ -32,7 +32,7 @@
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# include <xmmintrin.h> // __m128
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# undef BX_SIMD_SSE
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# define BX_SIMD_SSE 1
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#elif defined(__ARM_NEON__) && !BX_COMPILER_CLANG
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#elif defined(__ARM_NEON__) && (!BX_COMPILER_CLANG || BX_CLANG_HAS_EXTENSION(attribute_ext_vector_type) )
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# include <arm_neon.h>
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# undef BX_SIMD_NEON
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# define BX_SIMD_NEON 1
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