Updated spirv-headers.

2026-02-17 20:52:36 +01:00 · 2023-11-03 17:50:03 -07:00
parent 8b9afdef85
commit a651b93fac
7 changed files with 321 additions and 15 deletions
--- a/3rdparty/spirv-headers/include/spirv/spir-v.xml
+++ b/3rdparty/spirv-headers/include/spirv/spir-v.xml
@@ -90,7 +90,8 @@
        <id value="37"  vendor="heroseh" tool="Hero C Compiler" comment="https://github.com/heroseh/hcc"/>
        <id value="38"  vendor="Meta" tool="SparkSL" comment="Contact Dunfan Lu, dunfanlu@meta.com, https://sparkar.facebook.com/ar-studio/learn/sparksl/sparksl-overview"/>
        <id value="39"  vendor="SirLynix" tool="Nazara ShaderLang Compiler" comment="Contact Jérôme Leclercq, https://github.com/NazaraEngine/ShaderLang"/>
-        <unused start="40" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
+        <id value="40"  vendor="NVIDIA" tool="Slang Compiler" comment="Contact Theresa Foley, tfoley@nvidia.com, https://github.com/shader-slang/slang/"/>
+        <unused start="41" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
    </ids>

    <!-- SECTION: SPIR-V Opcodes and Enumerants -->
--- a/3rdparty/spirv-headers/include/spirv/unified1/NonSemanticClspvReflection.h
+++ b/3rdparty/spirv-headers/include/spirv/unified1/NonSemanticClspvReflection.h
@@ -33,7 +33,7 @@ extern "C" {
 #endif

 enum {
-    NonSemanticClspvReflectionRevision = 5,
+    NonSemanticClspvReflectionRevision = 6,
    NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff
 };

@@ -78,6 +78,7 @@ enum NonSemanticClspvReflectionInstructions {
    NonSemanticClspvReflectionPrintfInfo = 38,
    NonSemanticClspvReflectionPrintfBufferStorageBuffer = 39,
    NonSemanticClspvReflectionPrintfBufferPointerPushConstant = 40,
+    NonSemanticClspvReflectionNormalizedSamplerMaskPushConstant = 41,
    NonSemanticClspvReflectionInstructionsMax = 0x7fffffff
 };

--- a/3rdparty/spirv-headers/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
+++ b/3rdparty/spirv-headers/include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
@@ -1,5 +1,5 @@
 {
-  "revision" : 5,
+  "revision" : 6,
  "instructions" : [
    {
      "opname" : "Kernel",
@@ -395,6 +395,16 @@
      { "kind" : "IdRef", "name" : "Size"},
      { "kind" : "IdRef", "name" : "BufferSize"}
      ]
+    },
+    {
+    "opname" : "NormalizedSamplerMaskPushConstant",
+    "opcode" : 41,
+    "operands" : [
+      { "kind" : "IdRef", "name" : "Kernel" },
+      { "kind" : "IdRef", "name" : "Ordinal" },
+      { "kind" : "IdRef", "name" : "Offset" },
+      { "kind" : "IdRef", "name" : "Size" }
+      ]
    }
  ],
  "operand_kinds" : [
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json
@@ -5767,6 +5767,38 @@
      "extensions" : [ "SPV_NV_mesh_shader" ],
      "version" : "None"
    },
+    {
+      "opname" : "OpFetchMicroTriangleVertexPositionNV",
+      "class"  : "Reserved",
+      "opcode" : 5300,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdRef", "name" : "'Accel'" },
+        { "kind" : "IdRef", "name" : "'Instance Id'" },
+        { "kind" : "IdRef", "name" : "'Geometry Index'" },
+        { "kind" : "IdRef", "name" : "'Primitive Index'" },
+        { "kind" : "IdRef", "name" : "'Barycentric'" }
+      ],
+      "capabilities" : [ "DisplacementMicromapNV" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpFetchMicroTriangleVertexBarycentricNV",
+      "class"  : "Reserved",
+      "opcode" : 5301,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdRef", "name" : "'Accel'" },
+        { "kind" : "IdRef", "name" : "'Instance Id'" },
+        { "kind" : "IdRef", "name" : "'Geometry Index'" },
+        { "kind" : "IdRef", "name" : "'Primitive Index'" },
+        { "kind" : "IdRef", "name" : "'Barycentric'" }
+      ],
+      "capabilities" : [ "DisplacementMicromapNV" ],
+      "version" : "None"
+    },
    {
      "opname" : "OpReportIntersectionNV",
      "class"  : "Reserved",
@@ -10547,6 +10579,11 @@
          "enumerant" : "WGSL",
          "value" : 10,
 	  "version" : "1.0"
+        },
+        {
+          "enumerant" : "Slang",
+          "value" : 11,
+	  "version" : "1.0"
        }
      ]
    },
@@ -11741,31 +11778,26 @@
        {
          "enumerant" : "None",
          "value" : 0,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        },
        {
          "enumerant" : "ClampToEdge",
          "value" : 1,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        },
        {
          "enumerant" : "Clamp",
          "value" : 2,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        },
        {
          "enumerant" : "Repeat",
          "value" : 3,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        },
        {
          "enumerant" : "RepeatMirrored",
          "value" : 4,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        }
      ]
@@ -11777,13 +11809,11 @@
        {
          "enumerant" : "Nearest",
          "value" : 0,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        },
        {
          "enumerant" : "Linear",
          "value" : 1,
-          "capabilities" : [ "Kernel" ],
          "version": "1.0"
        }
      ]
@@ -13016,8 +13046,7 @@
          "version" : "None",
          "parameters" : [
            { "kind" : "LiteralInteger", "name" : "'Offset'" }
-          ],
-          "version": "1.0"
+          ]
        },
        {
          "enumerant" : "PerPrimitiveNV",
@@ -13371,6 +13400,30 @@
          "extensions" : [ "SPV_INTEL_fpga_memory_attributes" ],
          "version" : "None"
        },
+        {
+          "enumerant" : "StridesizeINTEL",
+          "value" : 5883,
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Stride Size'" }
+          ],
+          "capabilities" : [ "FPGAMemoryAttributesINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "WordsizeINTEL",
+          "value" : 5884,
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Word Size'" }
+          ],
+          "capabilities" : [ "FPGAMemoryAttributesINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "TrueDualPortINTEL",
+          "value" : 5885,
+          "capabilities" : [ "FPGAMemoryAttributesINTEL" ],
+          "version" : "None"
+        },
        {
          "enumerant" : "BurstCoalesceINTEL",
          "value" : 5899,
@@ -13642,6 +13695,26 @@
          "value" : 6183,
          "capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
          "version" : "None"
+        },
+        {
+          "enumerant" : "CacheControlLoadINTEL",
+          "value" : 6442,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Cache Level'" },
+            { "kind" : "LoadCacheControl", "name" : "'Cache Control'" }
+          ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "CacheControlStoreINTEL",
+          "value" : 6443,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "parameters" : [
+            { "kind" : "LiteralInteger", "name" : "'Cache Level'" },
+            { "kind" : "StoreCacheControl", "name" : "'Cache Control'" }
+          ],
+          "version" : "None"
        }
      ]
    },
@@ -14464,6 +14537,18 @@
          "capabilities" : [ "RayTracingPositionFetchKHR" ],
          "version" : "None"
        },
+        {
+          "enumerant" : "HitMicroTriangleVertexPositionsNV",
+          "value" : 5337,
+          "capabilities" : [ "RayTracingDisplacementMicromapNV" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "HitMicroTriangleVertexBarycentricsNV",
+          "value" : 5344,
+          "capabilities" : [ "RayTracingDisplacementMicromapNV" ],
+          "version" : "None"
+        },
        {
          "enumerant" : "IncomingRayFlagsNV",
          "value" : 5351,
@@ -14513,6 +14598,18 @@
          "extensions" : [ "SPV_NV_shader_sm_builtins" ],
          "version" : "None"
        },
+        {
+          "enumerant" : "HitKindFrontFacingMicroTriangleNV",
+          "value" : 5405,
+          "capabilities" : [ "RayTracingDisplacementMicromapNV" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "HitKindBackFacingMicroTriangleNV",
+          "value" : 5406,
+          "capabilities" : [ "RayTracingDisplacementMicromapNV" ],
+          "version" : "None"
+        },
        {
          "enumerant" : "CullMaskKHR",
          "value"  : 6021,
@@ -15747,6 +15844,13 @@
          "extensions" : [ "SPV_EXT_demote_to_helper_invocation" ],
          "version" : "1.6"
        },
+        {
+          "enumerant" : "DisplacementMicromapNV",
+          "value" : 5380,
+          "capabilities" : [ "Shader" ],
+          "extensions" : [ "SPV_NV_displacement_micromap" ],
+          "version" : "None"
+        },
        {
          "enumerant" : "RayTracingOpacityMicromapEXT",
          "value" : 5381,
@@ -15774,6 +15878,13 @@
          "extensions" : [ "SPV_KHR_ray_tracing_position_fetch" ],
          "version" : "None"
        },
+        {
+          "enumerant" : "RayTracingDisplacementMicromapNV",
+          "value" : 5409,
+          "capabilities" : [ "RayTracingKHR" ],
+          "extensions" : [ "SPV_NV_displacement_micromap" ],
+          "version" : "None"
+        },
        {
          "enumerant" : "SubgroupShuffleINTEL",
          "value" : 5568,
@@ -16190,6 +16301,12 @@
          "value" : 6400,
          "extensions" : [ "SPV_KHR_uniform_group_instructions"],
          "version" : "None"
+        },
+        {
+          "enumerant" : "CacheControlsINTEL",
+          "value" : 6441,
+          "extensions" : [ "SPV_INTEL_cache_controls" ],
+          "version" : "None"
        }
      ]
    },
@@ -16361,6 +16478,72 @@
        }
      ]
    },
+    {
+      "category" : "ValueEnum",
+      "kind" : "LoadCacheControl",
+      "enumerants" : [
+        {
+          "enumerant" : "UncachedINTEL",
+          "value" : 0,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "CachedINTEL",
+          "value" : 1,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "StreamingINTEL",
+          "value" : 2,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "InvalidateAfterReadINTEL",
+          "value" : 3,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "ConstCachedINTEL",
+          "value" : 4,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        }
+      ]
+    },
+    {
+      "category" : "ValueEnum",
+      "kind" : "StoreCacheControl",
+      "enumerants" : [
+        {
+          "enumerant" : "UncachedINTEL",
+          "value" : 0,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "WriteThroughINTEL",
+          "value" : 1,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "WriteBackINTEL",
+          "value" : 2,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        },
+        {
+          "enumerant" : "StreamingINTEL",
+          "value" : 3,
+          "capabilities" : [ "CacheControlsINTEL" ],
+          "version" : "None"
+        }
+      ]
+    },
    {
      "category" : "Id",
      "kind" : "IdResultType",
@@ -16396,6 +16579,11 @@
      "kind" : "LiteralString",
      "doc" : "A null-terminated stream of characters consuming an integral number of words"
    },
+    {
+      "category" : "Literal",
+      "kind" : "LiteralFloat",
+      "doc" : "A float consuming one word"
+    },
    {
      "category" : "Literal",
      "kind" : "LiteralContextDependentNumber",
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.h
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.h
@@ -76,6 +76,7 @@ typedef enum SpvSourceLanguage_ {
    SpvSourceLanguageHERO_C = 8,
    SpvSourceLanguageNZSL = 9,
    SpvSourceLanguageWGSL = 10,
+    SpvSourceLanguageSlang = 11,
    SpvSourceLanguageMax = 0x7fffffff,
 } SpvSourceLanguage;

@@ -586,6 +587,9 @@ typedef enum SpvDecoration_ {
    SpvDecorationMergeINTEL = 5834,
    SpvDecorationBankBitsINTEL = 5835,
    SpvDecorationForcePow2DepthINTEL = 5836,
+    SpvDecorationStridesizeINTEL = 5883,
+    SpvDecorationWordsizeINTEL = 5884,
+    SpvDecorationTrueDualPortINTEL = 5885,
    SpvDecorationBurstCoalesceINTEL = 5899,
    SpvDecorationCacheSizeINTEL = 5900,
    SpvDecorationDontStaticallyCoalesceINTEL = 5901,
@@ -619,6 +623,8 @@ typedef enum SpvDecoration_ {
    SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181,
    SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182,
    SpvDecorationStableKernelArgumentINTEL = 6183,
+    SpvDecorationCacheControlLoadINTEL = 6442,
+    SpvDecorationCacheControlStoreINTEL = 6443,
    SpvDecorationMax = 0x7fffffff,
 } SpvDecoration;

@@ -749,6 +755,8 @@ typedef enum SpvBuiltIn_ {
    SpvBuiltInHitKindNV = 5333,
    SpvBuiltInCurrentRayTimeNV = 5334,
    SpvBuiltInHitTriangleVertexPositionsKHR = 5335,
+    SpvBuiltInHitMicroTriangleVertexPositionsNV = 5337,
+    SpvBuiltInHitMicroTriangleVertexBarycentricsNV = 5344,
    SpvBuiltInIncomingRayFlagsKHR = 5351,
    SpvBuiltInIncomingRayFlagsNV = 5351,
    SpvBuiltInRayGeometryIndexKHR = 5352,
@@ -756,6 +764,8 @@ typedef enum SpvBuiltIn_ {
    SpvBuiltInSMCountNV = 5375,
    SpvBuiltInWarpIDNV = 5376,
    SpvBuiltInSMIDNV = 5377,
+    SpvBuiltInHitKindFrontFacingMicroTriangleNV = 5405,
+    SpvBuiltInHitKindBackFacingMicroTriangleNV = 5406,
    SpvBuiltInCullMaskKHR = 6021,
    SpvBuiltInMax = 0x7fffffff,
 } SpvBuiltIn;
@@ -1124,10 +1134,12 @@ typedef enum SpvCapability_ {
    SpvCapabilityFragmentShaderPixelInterlockEXT = 5378,
    SpvCapabilityDemoteToHelperInvocation = 5379,
    SpvCapabilityDemoteToHelperInvocationEXT = 5379,
+    SpvCapabilityDisplacementMicromapNV = 5380,
    SpvCapabilityRayTracingOpacityMicromapEXT = 5381,
    SpvCapabilityShaderInvocationReorderNV = 5383,
    SpvCapabilityBindlessTextureNV = 5390,
    SpvCapabilityRayQueryPositionFetchKHR = 5391,
+    SpvCapabilityRayTracingDisplacementMicromapNV = 5409,
    SpvCapabilitySubgroupShuffleINTEL = 5568,
    SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
    SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
@@ -1197,6 +1209,7 @@ typedef enum SpvCapability_ {
    SpvCapabilityFPGALatencyControlINTEL = 6171,
    SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
    SpvCapabilityGroupUniformArithmeticKHR = 6400,
+    SpvCapabilityCacheControlsINTEL = 6441,
    SpvCapabilityMax = 0x7fffffff,
 } SpvCapability;

@@ -1348,6 +1361,23 @@ typedef enum SpvHostAccessQualifier_ {
    SpvHostAccessQualifierMax = 0x7fffffff,
 } SpvHostAccessQualifier;

+typedef enum SpvLoadCacheControl_ {
+    SpvLoadCacheControlUncachedINTEL = 0,
+    SpvLoadCacheControlCachedINTEL = 1,
+    SpvLoadCacheControlStreamingINTEL = 2,
+    SpvLoadCacheControlInvalidateAfterReadINTEL = 3,
+    SpvLoadCacheControlConstCachedINTEL = 4,
+    SpvLoadCacheControlMax = 0x7fffffff,
+} SpvLoadCacheControl;
+
+typedef enum SpvStoreCacheControl_ {
+    SpvStoreCacheControlUncachedINTEL = 0,
+    SpvStoreCacheControlWriteThroughINTEL = 1,
+    SpvStoreCacheControlWriteBackINTEL = 2,
+    SpvStoreCacheControlStreamingINTEL = 3,
+    SpvStoreCacheControlMax = 0x7fffffff,
+} SpvStoreCacheControl;
+
 typedef enum SpvOp_ {
    SpvOpNop = 0,
    SpvOpUndef = 1,
@@ -1789,6 +1819,8 @@ typedef enum SpvOp_ {
    SpvOpSetMeshOutputsEXT = 5295,
    SpvOpGroupNonUniformPartitionNV = 5296,
    SpvOpWritePackedPrimitiveIndices4x8NV = 5299,
+    SpvOpFetchMicroTriangleVertexPositionNV = 5300,
+    SpvOpFetchMicroTriangleVertexBarycentricNV = 5301,
    SpvOpReportIntersectionKHR = 5334,
    SpvOpReportIntersectionNV = 5334,
    SpvOpIgnoreIntersectionNV = 5335,
@@ -2515,6 +2547,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
    case SpvOpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break;
    case SpvOpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break;
    case SpvOpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break;
+    case SpvOpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break;
+    case SpvOpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break;
    case SpvOpReportIntersectionNV: *hasResult = true; *hasResultType = true; break;
    case SpvOpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break;
    case SpvOpTerminateRayNV: *hasResult = false; *hasResultType = false; break;
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11
@@ -72,6 +72,7 @@ enum class SourceLanguage : unsigned {
    HERO_C = 8,
    NZSL = 9,
    WGSL = 10,
+    Slang = 11,
    Max = 0x7fffffff,
 };

@@ -582,6 +583,9 @@ enum class Decoration : unsigned {
    MergeINTEL = 5834,
    BankBitsINTEL = 5835,
    ForcePow2DepthINTEL = 5836,
+    StridesizeINTEL = 5883,
+    WordsizeINTEL = 5884,
+    TrueDualPortINTEL = 5885,
    BurstCoalesceINTEL = 5899,
    CacheSizeINTEL = 5900,
    DontStaticallyCoalesceINTEL = 5901,
@@ -615,6 +619,8 @@ enum class Decoration : unsigned {
    MMHostInterfaceMaxBurstINTEL = 6181,
    MMHostInterfaceWaitRequestINTEL = 6182,
    StableKernelArgumentINTEL = 6183,
+    CacheControlLoadINTEL = 6442,
+    CacheControlStoreINTEL = 6443,
    Max = 0x7fffffff,
 };

@@ -745,6 +751,8 @@ enum class BuiltIn : unsigned {
    HitKindNV = 5333,
    CurrentRayTimeNV = 5334,
    HitTriangleVertexPositionsKHR = 5335,
+    HitMicroTriangleVertexPositionsNV = 5337,
+    HitMicroTriangleVertexBarycentricsNV = 5344,
    IncomingRayFlagsKHR = 5351,
    IncomingRayFlagsNV = 5351,
    RayGeometryIndexKHR = 5352,
@@ -752,6 +760,8 @@ enum class BuiltIn : unsigned {
    SMCountNV = 5375,
    WarpIDNV = 5376,
    SMIDNV = 5377,
+    HitKindFrontFacingMicroTriangleNV = 5405,
+    HitKindBackFacingMicroTriangleNV = 5406,
    CullMaskKHR = 6021,
    Max = 0x7fffffff,
 };
@@ -1120,10 +1130,12 @@ enum class Capability : unsigned {
    FragmentShaderPixelInterlockEXT = 5378,
    DemoteToHelperInvocation = 5379,
    DemoteToHelperInvocationEXT = 5379,
+    DisplacementMicromapNV = 5380,
    RayTracingOpacityMicromapEXT = 5381,
    ShaderInvocationReorderNV = 5383,
    BindlessTextureNV = 5390,
    RayQueryPositionFetchKHR = 5391,
+    RayTracingDisplacementMicromapNV = 5409,
    SubgroupShuffleINTEL = 5568,
    SubgroupBufferBlockIOINTEL = 5569,
    SubgroupImageBlockIOINTEL = 5570,
@@ -1193,6 +1205,7 @@ enum class Capability : unsigned {
    FPGALatencyControlINTEL = 6171,
    FPGAArgumentInterfacesINTEL = 6174,
    GroupUniformArithmeticKHR = 6400,
+    CacheControlsINTEL = 6441,
    Max = 0x7fffffff,
 };

@@ -1344,6 +1357,23 @@ enum class HostAccessQualifier : unsigned {
    Max = 0x7fffffff,
 };

+enum class LoadCacheControl : unsigned {
+    UncachedINTEL = 0,
+    CachedINTEL = 1,
+    StreamingINTEL = 2,
+    InvalidateAfterReadINTEL = 3,
+    ConstCachedINTEL = 4,
+    Max = 0x7fffffff,
+};
+
+enum class StoreCacheControl : unsigned {
+    UncachedINTEL = 0,
+    WriteThroughINTEL = 1,
+    WriteBackINTEL = 2,
+    StreamingINTEL = 3,
+    Max = 0x7fffffff,
+};
+
 enum class Op : unsigned {
    OpNop = 0,
    OpUndef = 1,
@@ -1785,6 +1815,8 @@ enum class Op : unsigned {
    OpSetMeshOutputsEXT = 5295,
    OpGroupNonUniformPartitionNV = 5296,
    OpWritePackedPrimitiveIndices4x8NV = 5299,
+    OpFetchMicroTriangleVertexPositionNV = 5300,
+    OpFetchMicroTriangleVertexBarycentricNV = 5301,
    OpReportIntersectionKHR = 5334,
    OpReportIntersectionNV = 5334,
    OpIgnoreIntersectionNV = 5335,
@@ -2511,6 +2543,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
    case Op::OpSetMeshOutputsEXT: *hasResult = false; *hasResultType = false; break;
    case Op::OpGroupNonUniformPartitionNV: *hasResult = true; *hasResultType = true; break;
    case Op::OpWritePackedPrimitiveIndices4x8NV: *hasResult = false; *hasResultType = false; break;
+    case Op::OpFetchMicroTriangleVertexPositionNV: *hasResult = true; *hasResultType = true; break;
+    case Op::OpFetchMicroTriangleVertexBarycentricNV: *hasResult = true; *hasResultType = true; break;
    case Op::OpReportIntersectionNV: *hasResult = true; *hasResultType = true; break;
    case Op::OpIgnoreIntersectionNV: *hasResult = false; *hasResultType = false; break;
    case Op::OpTerminateRayNV: *hasResult = false; *hasResultType = false; break;
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.json
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.json
@@ -78,7 +78,8 @@
                    "SYCL": 7,
                    "HERO_C": 8,
                    "NZSL": 9,
-                    "WGSL": 10
+                    "WGSL": 10,
+                    "Slang": 11
                }
            },
            {
@@ -608,6 +609,9 @@
                    "MergeINTEL": 5834,
                    "BankBitsINTEL": 5835,
                    "ForcePow2DepthINTEL": 5836,
+                    "StridesizeINTEL": 5883,
+                    "WordsizeINTEL": 5884,
+                    "TrueDualPortINTEL": 5885,
                    "BurstCoalesceINTEL": 5899,
                    "CacheSizeINTEL": 5900,
                    "DontStaticallyCoalesceINTEL": 5901,
@@ -640,7 +644,9 @@
                    "MMHostInterfaceReadWriteModeINTEL": 6180,
                    "MMHostInterfaceMaxBurstINTEL": 6181,
                    "MMHostInterfaceWaitRequestINTEL": 6182,
-                    "StableKernelArgumentINTEL": 6183
+                    "StableKernelArgumentINTEL": 6183,
+                    "CacheControlLoadINTEL": 6442,
+                    "CacheControlStoreINTEL": 6443
                }
            },
            {
@@ -774,6 +780,8 @@
                    "HitKindNV": 5333,
                    "CurrentRayTimeNV": 5334,
                    "HitTriangleVertexPositionsKHR": 5335,
+                    "HitMicroTriangleVertexPositionsNV": 5337,
+                    "HitMicroTriangleVertexBarycentricsNV": 5344,
                    "IncomingRayFlagsKHR": 5351,
                    "IncomingRayFlagsNV": 5351,
                    "RayGeometryIndexKHR": 5352,
@@ -781,6 +789,8 @@
                    "SMCountNV": 5375,
                    "WarpIDNV": 5376,
                    "SMIDNV": 5377,
+                    "HitKindFrontFacingMicroTriangleNV": 5405,
+                    "HitKindBackFacingMicroTriangleNV": 5406,
                    "CullMaskKHR": 6021
                }
            },
@@ -1100,10 +1110,12 @@
                    "FragmentShaderPixelInterlockEXT": 5378,
                    "DemoteToHelperInvocation": 5379,
                    "DemoteToHelperInvocationEXT": 5379,
+                    "DisplacementMicromapNV": 5380,
                    "RayTracingOpacityMicromapEXT": 5381,
                    "ShaderInvocationReorderNV": 5383,
                    "BindlessTextureNV": 5390,
                    "RayQueryPositionFetchKHR": 5391,
+                    "RayTracingDisplacementMicromapNV": 5409,
                    "SubgroupShuffleINTEL": 5568,
                    "SubgroupBufferBlockIOINTEL": 5569,
                    "SubgroupImageBlockIOINTEL": 5570,
@@ -1172,7 +1184,8 @@
                    "FPMaxErrorINTEL": 6169,
                    "FPGALatencyControlINTEL": 6171,
                    "FPGAArgumentInterfacesINTEL": 6174,
-                    "GroupUniformArithmeticKHR": 6400
+                    "GroupUniformArithmeticKHR": 6400,
+                    "CacheControlsINTEL": 6441
                }
            },
            {
@@ -1336,6 +1349,29 @@
                    "ReadWriteINTEL": 3
                }
            },
+            {
+                "Name": "LoadCacheControl",
+                "Type": "Value",
+                "Values":
+                {
+                    "UncachedINTEL": 0,
+                    "CachedINTEL": 1,
+                    "StreamingINTEL": 2,
+                    "InvalidateAfterReadINTEL": 3,
+                    "ConstCachedINTEL": 4
+                }
+            },
+            {
+                "Name": "StoreCacheControl",
+                "Type": "Value",
+                "Values":
+                {
+                    "UncachedINTEL": 0,
+                    "WriteThroughINTEL": 1,
+                    "WriteBackINTEL": 2,
+                    "StreamingINTEL": 3
+                }
+            },
            {
                "Name": "Op",
                "Type": "Value",
@@ -1781,6 +1817,8 @@
                    "OpSetMeshOutputsEXT": 5295,
                    "OpGroupNonUniformPartitionNV": 5296,
                    "OpWritePackedPrimitiveIndices4x8NV": 5299,
+                    "OpFetchMicroTriangleVertexPositionNV": 5300,
+                    "OpFetchMicroTriangleVertexBarycentricNV": 5301,
                    "OpReportIntersectionKHR": 5334,
                    "OpReportIntersectionNV": 5334,
                    "OpIgnoreIntersectionNV": 5335,